M68HC11_03 Datasheet, PDF (172/268 Pages) Motorola, Inc – 8-channel, 8-bit analog-to-digital (A/D) converter

Freescale Semiconductor, Inc.
Electrical Characteristics
10.9 Control Timing
Characteristic^{(1) (2)}
1.0 MHz 2.0 MHz 3.0 MHz
Symbol
Unit
Min Max Min Max Min Max
Frequency of operation
f_o
dc 1.0 dc 2.0 dc 3.0 MHz
E-clock period
t_CYC 1000 — 500 — 333 —
ns
Crystal frequency
f_XTAL
— 4.0 — 8.0 — 12.0 MHz
External oscillator frequency
4 f_o
dc 4.0 dc 8.0 dc 12.0 MHz
Processor control setup time
t_PCSU = 1/4 t_CYC+ 50 ns
t_PCSU 300 — 175 — 133 —
ns
Reset input pulse width
To guarantee external reset vector
Minimum input time (can be pre-empted by internal reset)
PW_RSTL 8
—
8
—
8
—
t_CYC
1—1—1—
Mode programming setup time
t_MPS
2
—
2
—
2
—
t_CYC
Mode programming hold time
t_MPH
10 — 10 — 10 —
ns
Interrupt pulse width, IRQ edge-sensitive mode
PW_IRQ = t_CYC + 20 ns
PW_IRQ 1020 — 520 — 353 —
ns
Wait recovery startup time
t_WRS
—4—4—
4
t_CYC
Timer pulse width input capture pulse accumulator input
PW_TIM = t_CYC + 20 ns
PW_TIM 1020 — 520 — 353 —
ns
1. V_DD = 5.0 Vdc ±10%, V_SS = 0 Vdc, T_A = T_L to T_H, all timing is shown with respect to 20% V_DD and 70% V_DD, unless
otherwise noted
2. RESET is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for four clock cycles,
releases the pin, and samples the pin level two cycles later to determine the source of the interrupt. Refer to Section 5.
Resets and Interrupts for further detail.
Data Sheet
172
Electrical Characteristics
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M68HC11E Family — Rev. 5
MOTOROLA