MUN5311DW1T1 Datasheet, PDF (15/16 Pages) Motorola, Inc – Dual Bias Resistor Transistors

PACKAGE DIMENSIONS
MUN5311DW1T1 SERIES
A
G
V
6
5
4
S
–B–
1
2
3
D 6 PL
C
0.2 (0.008) M B M
N
J
H
K
CASE 419B–01
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.071 0.087
B 0.045 0.053
C 0.031 0.043
D 0.004 0.012
G
0.026 BSC
H ––– 0.004
J 0.004 0.010
K 0.004 0.012
N
0.008 REF
S 0.079 0.087
V 0.012 0.016
MILLIMETERS
MIN MAX
1.80 2.20
1.15 1.35
0.80 1.10
0.10 0.30
0.65 BSC
––– 0.10
0.10 0.25
0.10 0.30
0.20 REF
2.00 2.20
0.30 0.40
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
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