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M68HC08 Datasheet, PDF (145/230 Pages) Motorola, Inc – Microcontrollers | |||
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Timer Interface Module (TIM)
Input/Output Registers
10.10.4 TIM Channel Status and Control Registers
Each of the TIM channel status and control registers does the following:
⢠Flags input captures and output compares
⢠Enables input capture and output compare interrupts
⢠Selects input capture, output compare, or PWM operation
⢠Selects high, low, or toggling output on output compare
⢠Selects rising edge, falling edge, or any edge as the active input
capture trigger
⢠Selects output toggling on TIM overflow
⢠Selects 0% and 100% PWM duty cycle
⢠Selects buffered or unbuffered output compare/PWM operation
Address: $0025
Bit 7
Read: CH0F
Write: 0
Reset: 0
TSC0
6
CH0IE
0
5
MS0B
0
4
MS0A
0
3
2
ELS0B ELS0A
0
0
1
Bit 0
TOV0 CH0MAX
0
0
Address: $0028 TSC1
Bit 7
6
5
4
3
2
1
Read: CH1F
0
CH1IE
MS1A ELS1B ELS1A TOV1
Write: 0
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 10-7. TIM Channel Status and Control
Registers (TSC0:TSC1)
Bit 0
CH1MAX
0
CHxF â Channel x Flag Bit
When channel x is an input capture channel, this read/write bit is set
when an active edge occurs on the channel x pin. When channel x is
an output compare channel, CHxF is set when the value in the TIM
counter registers matches the value in the TIM channel x registers.
MC68HC908QY4â¢MC68HC908QT4â¢MC68HC908QY2â¢MC68HC908QT2â¢MC68HC908QY1â¢MC68HC908QT1
MOTOROLA
Timer Interface Module (TIM)
145
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