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MC33099 Datasheet, PDF (11/20 Pages) Motorola, Inc – Adaptive Alternator Voltage Regulator
Freescale Semiconductor, Inc.
regulator and activates all other voltage regulators and bias
currents. After engine start, the LRC mode is activated,
independent of the phase frequency or independent of a Wide
Open Throttle condition. When the battery system voltage
increases to Vset, the regulator resumes the normal operational
mode. After switching the ignition switch to the OFF position,
voltage Vign decreases below voltage VTign, causing the
comparator Cign to provide an ignition-OFF signal to the Ignition
Delay Circuit. After phase frequency fph < f1 due to ignition turn
OFF, supply currents and voltages are reduced in the regulator
to provide the standby drain current drain. However, voltage
VDD for logic and voltage Vref for reference voltages remain
active to be able to sense an ignition input voltage.
In some applications, the ignition input is connected to the
low side of the fault lamp as shown in Figure 2, page 9. When
the lamp driver circuitry is generating a lamp ON signal, a lamp
polling signal causes the Lamp Drain output to be periodically
GATED OFF. As a result, voltage Vign > VTign during the lamp
OFF polling period, causing comparator Cign to periodically
provides an ignition-ON signal to the Ignition Delay Circuit.
During the Lamp On condition, the Ignition Delay Circuit
provides a minimum ignition turn-off delay (tid(off)) such that all
currents and regulator voltages remain ON between the Lamp
Off polling pulses.
Battery and Alternator Output Voltage Sensing
The system battery voltage is directly sensed by the
REMOTE input using a remote wire as a Kelvin connection. The
Remote input resistance (Rrem) at the REMOTE input is
typically 68 kΩ. The voltage at the Remote Sense input (Vrs) is
a ratioed value of the Remote voltage (Vrem). The intended
ratio of Vrem/Vrs is about 7.45. The BAT terminal voltage (Vbat)
is also sensed as an internal Local voltage (Vl). A Local Sense
voltage (Vls) is a ratioed value of voltage Vl, where the intended
ratio of Vl/Vls is also 7.45. The Local internal connection is
provided for fault protection against the remote wire being
grounded or exhibiting a high remote wire resistance due to
being disconnected or due to a corrosive or loose connection.
Thus the Local connection ensures that alternator regulation of
the system voltage continues in well-defined states for all
possible Remote input fault conditions.
Local and Remote Voltage Processing and Switching
During Remote operation both the external Remote input
connection and internal Local connection senses approximately
the same regulated system voltage of Vset = 14.8 V. For this
case, voltages Vrs and Vls are approximately 2.0 V. Because
the remote switching comparator Crs is referenced to 0.6 V,
both switches S1 and S2 are OPEN and remain open when
voltage Vrs > 0.6 V or when voltage Vrem is greater than the
remote loss threshold voltage (VTrem). Voltage Vrs is coupled
to the input of a unity-gain combiner/buffer CB1. Voltage Vls is
buffered and coupled to the output of a unity-gain Local Buffer
(LB) and ratioed by the R5/(R4+R5) resistor divider to provide
an input voltage to a unity-gain combiner/buffer CB2. Thus the
voltage at the input of the combiner CB2 is normally 0.8 Vls (or
1.6 V typically), while voltage Vrs on the input of CB1 is typically
2.0 V. Because voltage Vo reflects the highest voltage at the
input of either combiner, voltage Vo will be voltage Vrs in
Remote operation with Remote connected to Vbat. For this
case, voltage Vrs is filtered by a 300 Hz low-pass filter and
translated to the FB buffer output. Voltage Vrs at the FB buffer
output is then compared to a digital-to-analog converter output
voltage ramp (Vdac) for duty cycle regulation.
During a Remote fault condition when the remote sense line
is OPEN or grounded, voltage Vrs at the Remote Sense input
will be zero, causing comparator Crs to activate switches S1
and S2 to a CLOSED position. As a result, voltage Vls is
coupled through buffer LB directly to the input of combiner CB2.
Because the voltage Vls on the input of combiner CB2 is greater
than voltage Vrs (= 0 V) on the input of combiner CB1, voltage
Vls is coupled to the output of the combiners as voltage Vo.
Thus in this fault case, voltage Vls is filtered and translated to
the FB buffer output for being compared to voltage ramp Vdac
for regulation.
During a remote fault condition in which the resistance of the
Remote sense wire increases due to the corrosion or a loose
connection, a finite external remote fault resistance occurs
causing voltage Vrem to decrease, but voltage Vrem remains
greater than voltage VTrem. As a result, switches S1 and S2
remain in an OPEN condition, while the system voltage will
increase due to the effective increase in the Remote resistor
divider ratio. As a result, voltage Vl increases until the voltage
at the input of combiner CB2 is approximately 2.0 V, or Vls is
about 1.2 (2.0 V), or 2.25 V due to the R4 /R5 divider ratio.
Because the local divider ratio translates voltage Vls to Vbat by
about factor 7.4, the final regulated output voltage for this
condition is 7.4 (2.25), or 18.5 V. This is the secondary
regulation voltage (Vset2). When the system voltage increases
to the Overvoltage Threshold (VTov), a fault indication occurs
by the lamp. Thus this particular Remote fault condition
produces a fault indication, but regulates to prevent an extreme
system overvoltage condition. When the Remote fault
resistance becomes great enough to cause voltage
Vrem < VTrem, the regulated system voltage returns to the local
regulation as described for an OPEN or grounded Remote
input.
Internal Clock Oscillator and 8-Bit Counter
An internal clock oscillator is provided having a typical
oscillation frequency (fosc) of 101 kHz. The output of the
oscillator is coupled to an 8-bit counter that provides 8 counting
bits to the logic and the four most significant counting bits
(MSB) to the LRC circuitry and to a digital-to-analog converter
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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33099
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