SN54LS490 Datasheet, PDF (1/5 Pages) Motorola, Inc – DUAL DECADE COUNTER

DUAL DECADE COUNTER
The SN54 / 74LS490 contains a pair of high-speed 4-stage ripple counters.
Each half of the SN54 / 74LS490 has individual Clock, Master Reset and Mas-
ter Set (Preset 9) inputs. Each section counts in the 8, 4, 2, 1 BCD code.
• Dual Version of SN54 / 74LS490
• Individual Asynchronous Clear and Preset to 9 for Each Counter
• Count Frequency — Typically 65 MHz
• Input Clamp Diodes Limit High-Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC CPb MRb Q0b MSb Q1b Q2b Q3b
16 15 14 13 12 11 10 9
1
2
3
4
5
6
78
CPa MRa Q0a MSa Q1a Q2a Q3a GND
PIN NAMES
LOADING (Note a)
HIGH
LOW
MS
MR
CP
Q0 – Q3
Master Set (Set to 9) Input
Master Reset
Clock Input (Active LOW Going Edge)
Counter Outputs (Note b)
0.5 U.L.
0.5 U.L.
1.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
1.5 U.L.
5 (2.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial
(74) Temperature Ranges.
LOGIC DIAGRAM (ONE HALF SHOWN)
4
MS
12
1
CP ₁₅
2
MR
14
K
J
CD SD
Q
3 Q0 13
K
J
CD
Q
K
J
CD
Q
5 Q1 11
6 Q2 10
K CP J
CD SD
Q
7 Q3 9
SN54/74LS490
DUAL DECADE COUNTER
LOW POWER SCHOTTKY
16
1
16
1
16
1
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
TRUTH TABLE
OUTPUTS
COUNT
0
1
2
Q3 Q2 Q1 Q0
L
L
L
L
L
L
L
H
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
L
H
L
H
6
L
H
H
L
7
L
H
H
H
8
H
L
L
L
9
H
L
L
H
FAST AND LS TTL DATA
5-563