MTY55N20E Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 55 AMPERES 200 VOLTS RDS(on) = 0.028 OHM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
™ Designer's Data Sheet
TMOS E-FET.™
Power Field Effect Transistor
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS power FET is designed to withstand high
energy in the avalanche and commutation modes. This new energy
efficient design also offers a drain–to–source diode with fast
recovery time. Designed for high voltage, high speed switching
applications in power supplies, converters, PWM motor controls,
and other inductive loads. The avalanche energy capability is
specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
• Avalanche Energy Specified
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
®
D
Order this document
by MTY55N20E/D
MTY55N20E
Motorola Preferred Device
TMOS POWER FET
55 AMPERES
200 VOLTS
RDS(on) = 0.028 OHM
G
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1 MΩ)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Drain Current — Continuous @ TC = 25°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 80 Vdc, VGS = 10 Vdc, Peak IL = 110 Apk, L = 0.3 mH, RG = 25 Ω )
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
CASE 340G–02, STYLE 1
TO–264
S
Symbol
VDSS
VDGR
VGS
VGSM
ID
IDM
PD
TJ, Tstg
EAS
Value
200
200
± 20
± 40
55
165
300
2.38
– 55 to 150
3000
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
°C
mJ
R_θJC
R_θJA
TL
0.42
°C/W
40
260
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
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