MTW33N10E Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 33 AMPERES 100 VOLTS RDS(on) = 0.06 OHM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTW33N10E/D
™ Designer's Data Sheet
TMOS EĆFET.™
Power Field Effect Transistor
TOĆ247 with Isolated Mounting Hole
N-Channel Enhancement-Mode Silicon Gate
This advanced TMOS E-FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain-to-source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
®
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Avalanche Energy Specified
• Source-to-Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Isolated Mounting Hole Reduces Mounting Hardware
D
N-Channel
MTW33N10E
Motorola Preferred Device
TMOS POWER FET
33 AMPERES
100 VOLTS
RDS(on) = 0.06 OHM
G
S
CASE 340F, Style 1
TO-247AE
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain-Source Voltage
Drain-Gate Voltage (RGS = 1.0 MΩ)
Gate-Source Voltage — Continuous
Gate-Source Voltage — Non-Repetitive (tp ≤ 10 ms)
Drain Current — Continuous @ 25°C
— Continuous @ 100°C
— Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
100
Vdc
100
Vdc
± 20
Vdc
± 40
Vpk
33
Adc
20
99
Apk
125
Watts
1.0
W/°C
Operating and Storage Temperature Range
TJ, Tstg
– 55 to 150
°C
Single Pulse Drain-to-Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, IL = 33 Apk, L = 1.000 mH, RG = 25 Ω)
EAS
545
mJ
Thermal Resistance — Junction to Case
— Junction to Ambient
R_θJC
R_θJA
1.0
°C/W
40
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 5 seconds
TL
260
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E-FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
3/94
© M_Mo_TTt_WoWro₃3la₃3,_NNIn₁c1₀.0_E1E994
1
M^MO^OTO^TORO^RL^OA^LA
1¹