MTW14N50E Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 14 AMPERES 500 VOLTS RDS(on) = 0.40 OHM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MTW14N50E/D
™ Designer's Data Sheet
TMOS E-FET.™
Power Field Effect Transistor
TO-247 with Isolated Mounting Hole
N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS E–FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for high voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Designed to Replace External Zener Transient Suppressor —
Absorbs High Energy in the Avalanche Mode
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
®
D
MTW14N50E
Motorola Preferred Device
TMOS POWER FET
14 AMPERES
500 VOLTS
RDS(on) = 0.40 OHM
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
G
CASE 340K–01, Style 1
TO–247AE
S
Symbol
Value
Unit
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
VDSS
VDGR
VGS
ID
ID
IDM
PD
500
Vdc
500
Vdc
± 20
Vdc
14
Adc
9.0
60
Apk
180
Watts
1.44
W/°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — STARTING TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vpk, IL = 14 Apk, L = 8.8 mH, RG = 25 Ω )
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TJ, Tstg
EAS
R_θJC
R_θJA
TL
– 55 to 150
860
0.7
40
260
°C
mJ
°C/W
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 4
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