MTP75N06HD Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 75 AMPERES RDS(on) = 10.0 mOHM 60 VOLTS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MTP75N06HD/D
™ Designer's Data Sheet
HDTMOS E-FET ™
High Density Power FET
N–Channel Enhancement–Mode Silicon Gate
This advanced high–cell density HDTMOS E–FET is designed to
withstand high energy in the avalanche and commutation modes.
This new energy efficient design also offers a drain–to–source
diode with a fast recovery time. Designed for low–voltage,
high–speed switching applications in power supplies, converters
and PWM motor controls, and inductive loads. The avalanche
energy capability is specified to eliminate the guesswork in designs
where inductive loads are switched, and to offer additional safety
margin against unexpected voltage transients.
• Ultra Low RDS(on), High–Cell Density, HDTMOS
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
• Avalanche Energy Specified
MTP75N06HD
Motorola Preferred Device
TMOS POWER FET
75 AMPERES
RDS(on) = 10.0 mOHM
60 VOLTS
™
D
G
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Single Pulse
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, IL = 75 Apk, L = 0.177 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
CASE 221A–06, Style 5
TO–220AB
S
Symbol
VDSS
VDGR
VGS
ID
ID
IDM
PD
TJ, Tstg
EAS
R_θJC
R_θJA
TL
Value
60
60
± 20
± 30
75
50
225
150
1.0
– 55 to 175
500
1.0
62.5
260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
°C
mJ
°C/W
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET, Designer’s and HDTMOS are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
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