MTP75N05HD Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 75 AMPERES RDS(on) = 9.5 mW 50 VOLTS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
™ Designer's Data Sheet
HDTMOS E-FET^™
Power Field Effect Transistor
N–Channel Enhancement–Mode Silicon Gate
This advanced high–cell density HDTMOS E–FET is designed to
withstand high energy in the avalanche and commutation modes.
This new energy–efficient design also offers a drain–to–source
diode with a fast recovery time. Designed for low–voltage,
high–speed switching applications in power supplies, converters
and PWM motor controls, and other inductive loads. The avalanche
energy capability is specified to eliminate the guesswork in designs
where inductive loads are switched, and to offer additional safety
margin against unexpected voltage transients.
• Ultra Low RDS(on), High–Cell Density, HDTMOS
• SPICE Parameters Available
• Diode is Characterized for Use in Bridge Circuits
• Diode Exhibits High Speed, Yet Soft Recovery
• IDSS and VDS(on) Specified at Elevated Temperature
• Avalanche Energy Specified
®
D
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by MTP75N05HD/D
MTP75N05HD
Motorola Preferred Device
TMOS POWER FET
75 AMPERES
RDS(on) = 9.5 mΩ
50 VOLTS
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
G
CASE 221A–06, Style 5
TO–220AB
S
Symbol
Value
Unit
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
VDSS
VDGR
VGS
ID
ID
IDM
PD
50
Vdc
50
Vdc
± 20
Vdc
75
Adc
65
225
Apk
150
Watts
1
W/°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vpk, IL = 75 Apk, L = 0.177 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TJ, Tstg
EAS
R_θJC
R_θJA
TL
– 55 to 175
500
1.00
62.5
260
°C
mJ
°C/W
°C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s, E–FET and HDTMOS are trademarks of Motorola Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
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