MTP3N60E Datasheet, PDF (1/8 Pages) Motorola, Inc – TMOS POWER FET 3.0 AMPERES 600 VOLTS RDS(on) = 2.2 OHMS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MTP3N60E/D
™ Designer's Data Sheet
TMOS E-FET.™
High Energy Power FET
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications such as power supplies, PWM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
• Avalanche Energy Capability Specified at Elevated
Temperature
• Low Stored Gate Charge for Efficient Switching
• Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor — Absorbs High Energy in the
G
Avalanche Mode
• Source–to–Drain Diode Recovery Time Comparable to Discrete
Fast Recovery Diode
®
D
S
MTP3N60E
Motorola Preferred Device
TMOS POWER FET
3.0 AMPERES
600 VOLTS
RDS(on) = 2.2 OHMS
CASE 221A–09, Style 5
TO-220AB
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–repetitive
VDSS
VDGR
VGS
VGSM
600
Vdc
600
Vdc
± 20
Vdc
± 40
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Pulsed
Total Power Dissipation @ TC = 25°C
Derate above 25°C
ID
3.0
Adc
ID
2.4
IDM
14
PD
75
Watts
0.6
W/°C
Operating and Storage Temperature Range
TJ, Tstg
– 55 to 150
°C
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (TJ < 150°C)
Single Pulse Drain–to–Source Avalanche Energy — TJ = 25°C
Single Pulse Drain–to–Source Avalanche Energy — TJ = 100°C
Repetitive Pulse Drain–to–Source Avalanche Energy
WDSR(1)
290
mJ
46
WDSR(2)
7.5
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case°
Thermal Resistance — Junction to Ambient°
R_θJC
R_θJA
1.67
°C/W
62.5
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TL
260
°C
(1) VDD = 50 V, ID = 3.0 A
(2) Pulse Width and frequency is limited by TJ(max) and thermal response
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
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