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MTB60N06HD Datasheet, PDF (1/12 Pages) Motorola, Inc – TMOS POWER FET 60 AMPERES 60 VOLTS | |||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MTB60N06HD/D
⢠Designer's Data Sheet
HDTMOS E-FET.â¢
High Energy Power FET
D2PAK for Surface Mount
NâChannel EnhancementâMode Silicon Gate
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
in applications that require the use of surface mount components
with higher power and lower RDS(on) capabilities. This advanced
highâcell density HDTMOS power FET is designed to withstand
high energy in the avalanche and commutation modes. This new
energy efficient design also offers a drainâtoâsource diode with a
fast recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
⢠Avalanche Energy Specified
G
⢠SourceâtoâDrain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
⢠Diode is Characterized for Use in Bridge Circuits
⢠IDSS and VDS(on) Specified at Elevated Temperature
⢠Short Heatsink Tab Manufactured â Not Sheared
⢠Specially Designed Leadframe for Maximum Power Dissipation
⢠Available in 24 mm 13âinch/800 Unit Tape & Reel, Add T4
Suffix to Part Number
MTB60N06HD
Motorola Preferred Device
TMOS POWER FET
60 AMPERES
60 VOLTS
RDS(on) = 0.014 OHM
â¢
D
CASE 418Bâ02, Style 2
D2PAK
S
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
DrainâSource Voltage
DrainâGate Voltage (RGS = 1.0 Mâ¦)
GateâSource Voltage â Continuous
GateâSource Voltage â NonâRepetitive (tp ⤠10 ms)
Drain Current â Continuous
Drain Current â Continuous @ 100°C
Drain Current â Single Pulse (tp ⤠10 µs)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse DrainâtoâSource Avalanche Energy â Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 60 Apk, L = 0.3 mH, RG = 25 â¦)
Thermal Resistance â Junction to Case
Thermal Resistance â Junction to Ambient
Thermal Resistance â Junction to Ambient, when mounted with the minimum recommended pad size
Maximum Lead Temperature for Soldering Purposes, 1/8â³ from case for 10 seconds
(1) When mounted with the minimum recommended pad size.
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
EAS
RθJC
RθJA
RθJA
TL
60
60
± 20
± 30
60
42.3
180
125
1.0
2.5
â 55 to 150
540
1.0
62.5
50
260
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
Designerâs Data for âWorst Caseâ Conditions â The Designerâs Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves â representing boundaries on device characteristics â are given to facilitate âworst caseâ design.
EâFET, Designerâs and HDTMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 2
© MMoototroorlao,lIancT. 1M99O5S Power MOSFET Transistor Device Data
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