MRFIC1502 Datasheet, PDF (1/7 Pages) Motorola, Inc – 1.575 GHz GPS DOWNCONVERTER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
Integrated GPS Downconverter
This integrated circuit is intended for GPS receiver applications. The dual
conversion design is implemented in Motorola’s low–cost high performance
MOSAIC 3 silicon bipolar process and is packaged in a low–cost surface mount
TQFP–48 package. In addition to the mixers, a VCO, a PLL and a loop filter are
integrated on–chip. Output IF is nominally 9.5 MHz.
• 65 dB Minimum Conversion Gain
• 5 Volts Operation
• 50 mA Typical Current Consumption
• Low–Cost, Low Profile Plastic TQFP Package
• Device Marking = M1502
Order this document
by MRFIC1502/D
MRFIC1502
1.575 GHz GPS
DOWNCONVERTER
CASE 932–02
(TQFP–48)
GND GND GND GND RF IN GND VCC1 GND
48 47 46 45 44 43 42 41
TO FROM
BPF BPF ^{GND GND}
40 39 38 37
GND ^{1 TQFP–48}
36 GND
VCO VT ²
35 38 MHz TRAP
GND ³
34 ^{38 MHz TRAP}
VCC5 4
GND ⁵
VCO CE ⁶
GND 7
ACTIVE VCO
FILTER
40
2
33 BYPASS CAP
32 IF OUT
31 VCC2
30 GND
SF CAP1 ⁸
GND 9
SF CAP2 10
LOOP
FILTER
PHASE
DETECTOR
29 GAIN CONTROL
28 VCC3
27 GND
GND ₁₁
26 ^GND
GND 12
25 GND
13 14 15 16 17 18 19 20 21 22 23 24
C2A C2B C1 CA CB DCX0 VCC4 GND CLK GND GND GND
OUT
Pin Connections and Functional Block Diagram
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MRFIC1502
1