MMDF2P02E Datasheet, PDF (1/10 Pages) Motorola, Inc – DUAL TMOS MOSFET 2.5 AMPERES 25 VOLTS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MMDF2P02E/D
™ Designer's Data Sheet
Medium Power Surface Mount Products
TMOS Dual P-Channel
Field Effect Transistors
MiniMOS™ devices are an advanced series of power MOSFETs
which utilize Motorola’s TMOS process. These miniature surface
mount MOSFETs feature ultra low RDS(on) and true logic level
performance. They are capable of withstanding high energy in the
avalanche and commutation modes and the drain–to–source diode
has a low reverse recovery time. MiniMOS devices are designed
for use in low voltage, high speed switching applications where
power efficiency is important. Typical applications are dc–dc
converters, and power management in portable and battery
powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor
controls in mass storage products such as disk drives and tape
drives. The avalanche energy is specified to eliminate the
guesswork in designs where inductive loads are switched and offer _G
additional safety margin against unexpected voltage transients.
• Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
• Logic Level Gate Drive — Can Be Driven by Logic ICs
• Miniature SO–8 Surface Mount Package — Saves Board Space
• Diode Is Characterized for Use In Bridge Circuits
• Diode Exhibits High Speed, with Soft Recovery
• IDSS Specified at Elevated Temperatures
• Avalanche Energy Specified
• Mounting Information for SO–8 Package Provided
MMDF2P02E
DUAL TMOS MOSFET
2.5 AMPERES
25 VOLTS
RDS(on) = 0.250 OHM
®
D
CASE 751–05, Style 11
SO–8
S
Source–1
18
Drain–1
Gate–1 2 7 Drain–1
Source–2 3 6 Drain–2
Gate–2 4 5 Drain–2
Top View
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)(1)
Rating
Symbol
Value
Unit
Drain–to–Source Voltage
Gate–to–Source Voltage — Continuous
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ TA = 25°C ⁽²⁾
Derate above 25°C
VDSS
VGS
ID
ID
IDM
PD
25
Vdc
± 20
Vdc
2.5
Adc
1.7
13
Apk
2.0
W
16
mW/°C
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 10 Vdc, Peak IL = 7.0 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance, Junction to Ambient ⁽²⁾
Maximum Lead Temperature for Soldering Purposes, 0.0625″ from case for 10 seconds
DEVICE MARKING
TJ, Tstg
EAS
R_θJA
TL
– 55 to 150
245
62.5
260
°C
mJ
°C/W
°C
F2P02
(1) Negative sign for P–Channel device omitted for clarity.
(2) Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided) with one die operating, 10 sec. max.
ORDERING INFORMATION
Device
Reel Size
Tape Width
Quantity
MMDF2P02ER2
13″
12 mm embossed tape
2500
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s, E–FET and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
REV 5
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