MCM6726C Datasheet, PDF (1/7 Pages) Motorola, Inc – 128K x 8 Bit Fast Static Random Access Memory

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
128K x 8 Bit Fast Static Random
Access Memory
The MCM6726C is a 1,048,576 bit static random access memory organized
as 131,072 words of 8 bits. Static design eliminates the need for external clocks
or timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
This device meets JEDEC standards for functionality and revolutionary pinout,
and is available in a 400 mil plastic small–outline J–leaded package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs Are TTL Compatible
• Three State Outputs
• Fast Access Times: 6, 7 ns
• Center Power and I/O Pins for Reduced Noise
BLOCK DIAGRAM
A
VCC
A
VSS
A
MEMORY
A
ROW
MATRIX
A
DECODER
512 ROWS x 256 x 8
COLUMNS
A
A
A
DQ
COLUMN I/O
INPUT
DATA
CONTROL
COLUMN DECODER
DQ
A AA A A AA AA
E
W
G
Order this document
by MCM6726C/D
MCM6726C
WJ PACKAGE
400 MIL SOJ
CASE 857A–02
PIN ASSIGNMENT
A1
A2
A3
A4
E5
DQ ₆
DQ ₇
VCC 8
VSS 9
DQ 10
DQ 11
W ₁₂
A ₁₃
A 14
A ₁₅
A 16
32 ^A
31 ^A
30 ^A
29 ^A
28 ^G
27 ^DQ
26 ^DQ
25 ^VSS
24 ^VCC
23 ^DQ
22 ^DQ
21 ^A
20 A
19 ^A
18 ^A
17 ^A
PIN NAMES
A . . . . . . . . . . . . . . . . . . . . Address Input
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
DQ . . . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
REV 3
3/7/97
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MCM6726C
1