MCM6709BR Datasheet, PDF (1/7 Pages) Motorola, Inc – 64K x 4 Bit Static RAM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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64K x 4 Bit Static RAM
The MCM6709BR is a 262,144 bit static random access memory organized as
65,536 words of 4 bits. Static design eliminates the need for external clocks or
timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
The MCM6709BR meets JEDEC standards and is available in a revolutionary
pinout 300 mil, 28 lead plastic surface–mount SOJ package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs are TTL Compatible
• Center Power and I/O Pins for Reduced Noise
• Three State Outputs
• Fast Access Times:
MCM6709BR–6 = 6 ns
MCM6709BR–7 = 7 ns
MCM6709BR–8 = 8 ns
BLOCK DIAGRAM
A
A
A
A
A
A
ROW
••
DECODER ^•
MEMORY MATRIX
512 ROWS x 128 x 4
COLUMNS
A
A
A
DQ
COLUMN I/O
••
••
•
••
•
INPUT
DATA
•
COLUMN DECODER
CONTROL
DQ
AA A AAA A
E
W
G
Order this document
by MCM6709BR/D
MCM6709BR
J PACKAGE
300 MIL SOJ
CASE 810B–03
PIN ASSIGNMENT
A1
A2
A3
A4
E5
DQ 6
VCC 7
VSS 8
DQ 9
W 10
A 11
A 12
A ₁₃
A 14
28 A
27 A
26 A
25 A
24 G
23 DQ
22 VSS
21 VCC
20 DQ
19 A
18 A
17 A
16 ^A
15 NC
PIN NAMES
A . . . . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ . . . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . No Connection
All power supply and ground pins must
be connected for proper operation of the
device.
This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 2
3/17/97
M^© O^MoT^toO^roR^la,O^InL^c.A¹⁹F⁹⁷AST SRAM
MCM6709BR
1