MCM6709B Datasheet, PDF (1/7 Pages) Motorola, Inc – 64K x 4 Bit Static RAM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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64K x 4 Bit Static RAM
The MCM6709B is a 262,144 bit static random access memory organized as
65,536 words of 4 bit. Static design eliminates the need for external clocks or tim-
ing strobes.
Output enable (G), a special control feature of the MCM6709B, provides in-
creased system flexibility and eliminates bus contention problems.
The MCM6709B is available in a 300 mil, 28 lead plastic surface–mount SOJ
package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs are TTL Compatible
• Three State Outputs
• Fast Access Times: MCM6709B–8 = 8 ns
MCM6709B–10 = 10 ns
MCM6709B–12 = 12 ns
BLOCK DIAGRAM
A
A
A
A
A
ROW
DECODER
•••
MEMORY MATRIX
256 ROWS x 256 x 4
COLUMNS
A
A
A
DQ
•••
•••
INPUT
DATA
CONTROL
COLUMN I/O
•••
COLUMN DECODER
DQ
AA A A AAAA
E
W
G
Order this document
by MCM6709B/D
MCM6709B
J PACKAGE
300 MIL SOJ
CASE 810B–03
PIN ASSIGNMENT
NC 1
A2
A3
A4
A5
A6
A7
A8
A9
A 10
A ₁₁
E ₁₂
G ₁₃
VSS ₁₄
28 VCC
27 A
26 A
25 A
24 A
23 A
22 A
21 NC
20 NC
19 DQ
18 _DQ
17 _DQ
16 _DQ
15 _W
PIN NAMES
A . . . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . No Connection
This document contains informantion on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 1
10/9/96
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MCM6709B
1