MCM6709AR Datasheet, PDF (1/8 Pages) Motorola, Inc – 64K x 4 Bit Static RAM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
64K x 4 Bit Static RAM
The MCM6709AR is a 262,144 bit static random access memory organized as
65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS
technology. Static design eliminates the need for external clocks or timing
strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
The MCM6709AR meets JEDEC standards and is available in a revolutionary
pinout 300 mil, 28 lead plastic surface–mount SOJ package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs are TTL Compatible
• Center Power and I/O Pins for Reduced Noise
• Three State Outputs
• Fast Access Times: MCM6709AR–6 = 6 ns
MCM6709AR–7 = 7 ns
BLOCK DIAGRAM
A
A
A
A
A
A
ROW
DECODER
•••
MEMORY MATRIX
512 ROWS x 128 x 4
COLUMNS
A
A
A
DQ0
•••
•••
INPUT
DATA
CONTROL
COLUMN I/O
•••
COLUMN DECODER
DQ3
AA A AAA A
E
W
G
Order this document
by MCM6709AR/D
MCM6709AR
J PACKAGE
300 MIL SOJ
CASE 810B–03
PIN ASSIGNMENT
A0 1
A1 2
A2 3
A3 4
E5
DQ0 6
VCC 7
VSS 8
DQ1 9
W 10
A4 11
A5 12
A6 ₁₃
A7 14
28 A15
27 A14
26 A13
25 A12
24 G
23 DQ3
22 VSS
21 VCC
20 DQ2
19 A11
18 A10
17 A9
16 ^A8
15 NC
PIN NAMES
A0 – A15 . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ0 – DQ3 . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . No Connection
All power supply and ground pins must
be connected for proper operation of the
device.
5/95
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MCM6709AR
1