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MCM6709A Datasheet, PDF (1/8 Pages) Motorola, Inc – 64K x 4 Bit Static RAM
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM6709A/D
64K x 4 Bit Static RAM
The MCM6709A is a 262,144 bit static random access memory organized as
65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS
technology. Static design eliminates the need for external clocks or timing
strobes.
Output enable (G) provides increased system flexibility and eliminates bus
contention problems.
The MCM6709A is available in a 300 mil, 28 lead plastic surface–mount SOJ
package.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs are TTL Compatible
• Three State Outputs
• Fast Access Times:
MCM6709A–8 = 8 ns
MCM6709A–10 = 10 ns
MCM6709A–12 = 12 ns
BLOCK DIAGRAM
A
A
A
A
A
ROW
DECODER
MEMORY MATRIX
256 ROWS x 256 x 4
COLUMNS
A
A
A
DQ0
•••
•••
INPUT
DATA
CONTROL
COLUMN I/O
•••
COLUMN DECODER
DQ3
AA A A AAAA
E
W
G
MCM6709A
J PACKAGE
300 MIL SOJ
CASE 810B–03
PIN ASSIGNMENT
NC 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
A8 10
A9 11
E 12
G 13
VSS 14
28 VCC
27 A15
26 A14
25 A13
24 A12
23 A11
22 A10
21 NC
20 NC
19 DQ0
18 DQ1
17 DQ2
16 DQ3
15 W
PIN NAMES
A0 – A15 . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ0 – DQ3 . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . No Connection
5/95
M© OMoTtoOroRla,OInLc.A19F95AST SRAM
MCM6709A
2–1