MCM6706R Datasheet, PDF (1/8 Pages) Motorola, Inc – 32K x 8 Bit Static Random Access Memory

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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by MCM6706R/D
32K x 8 Bit Static Random Access
Memory
The MCM6706R is a 262,144 bit static random access memory organized as
32,768 words of 8 bits, fabricated using high performance silicon–gate BiCMOS
technology. Static design eliminates the need for external clocks or timing
strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
The MCM6706R meets JEDEC standards and is available in a revolutionary
pinout 300 mil, 32–lead surface–mount SOJ package.
• Single 5.0 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs Are TTL Compatible
• Three State Outputs
• Fast Access Times: MCM6706R–6 = 6 ns
MCM6706R–7 = 7 ns
MCM6706R–8 = 8 ns
• Center Power and I/O Pins for Reduced Noise
BLOCK DIAGRAM
A
A
VCC
VSS
A
A
MEMORY
A
ROW
MATRIX
DECODER
512 ROWS x 64 x 8
A
COLUMNS
A
A
A
DQ0
COLUMN I/O
INPUT
DATA
COLUMN DECODER
CONTROL
DQ7
A AA A AA
E
W
G
MCM6706R
J PACKAGE
300 MIL SOJ
CASE 857–02
PIN ASSIGNMENT
A0 ₁
A1 ₂
A2 ₃
A3 ₄
E5
DQ0 ₆
DQ1 ₇
VCC ₈
VSS ₉
DQ2 ₁₀
DQ3 ₁₁
W ₁₂
A4 ₁₃
A5 14
A6 ₁₅
A7 16
32 ^NC
31 ^A14
30 ^A13
29 ^A12
28 ^G
27 ^DQ7
26 ^DQ6
25 ^VSS
24 ^VCC
23 ^DQ5
22 ^DQ4
21 ^A11
20 ^A10
19 ^A9
18 ^A8
17 ^NC
PIN NAMES
A0 – A14 . . . . . . . . . . . . . . . . . . Address
W . . . . . . . . . . . . . . . . . . . . Write Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
DQ0 – DQ7 . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . No Connection
REV 1
5/95
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MCM6706R
1