MCM6706BR Datasheet, PDF (1/7 Pages) Motorola, Inc – 32K x 8 Bit Static Random Access Memory

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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32K x 8 Bit Static Random
Access Memory
The MCM6706BR is a 262,144 bit static random access memory organized as
32,768 words of 8 bits. Static design eliminates the need for external clocks or
timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
The MCM6706BR meets JEDEC standards and is available in a revolutionary
pinout 300 mil, 32–lead surface–mount SOJ package.
• Single 5.0 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• All Inputs and Outputs Are TTL Compatible
• Three State Outputs
• Fast Access Times: MCM6706BR–6 = 6 ns
MCM6706BR–7 = 7 ns
MCM6706BR–8 = 8 ns
• Center Power and I/O Pins for Reduced Noise
BLOCK DIAGRAM
A
A
VCC
VSS
A
A
MEMORY
A
ROW
MATRIX
DECODER
512 ROWS x 64 x 8
A
COLUMNS
A
A
A
D0
COLUMN I/O
INPUT
DATA
CONTROL
COLUMN DECODER
DQ
A AA A AA
E
W
G
MCM6706BR
J PACKAGE
300 MIL SOJ
CASE 857–02
PIN ASSIGNMENT
A1
A2
A3
A4
E5
DQ ₆
DQ ₇
VCC 8
VSS 9
DQ 10
DQ 11
W ₁₂
A ₁₃
A 14
A ₁₅
A 16
32 ^NC
31 ^A
30 ^A
29 ^A
28 ^G
27 ^DQ
26 ^DQ
25 ^VSS
24 ^VCC
23 ^DQ
22 ^DQ
21 ^A
20 A
19 ^A
18 ^A
17 ^NC
PIN NAMES
A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address
W . . . . . . . . . . . . . . . . . . . . . . . . . Write Enable
E . . . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable
G . . . . . . . . . . . . . . . . . . . . . . . Output Enable
DQ . . . . . . . . . . . . . . . . . . . Data Input/Output
VCC . . . . . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . . . . . . No Connection
This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
REV 1
10/9/96
M^© O^MoT^toO^roR^la,O^InL^c.A¹⁹F⁹⁶AST SRAM
MCM6706BR
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