MCM64AF32 Datasheet, PDF (1/12 Pages) Motorola, Inc – 256K Asynchronous Secondary Cache Module for Pentium

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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256K Asynchronous Secondary
Cache Module for Pentium™
The MCM64AF32 is designed to provide 256K of asynchronous L2 cache for
the Pentium microprocessor in conjunction with Intel’s Triton chip set. The mod-
ule is configured as 32K x 64 bits in a 160 pin card edge connector. The module
uses eight Motorola 3.3 V 32K x 8 FSRAMs for the cache memory, one Motorola
5 V 32K x 8 FSRAM for the tag RAM, and an upper order address latch.
Eight write enables are provided for byte write control.
PD0–PD4 identify density and functionality.
This cache module is plug and pin compatible with the other members of
Motorola’s Triton chip set module family, the MCM72JG32SG66 (a 256K byte
pipelined BurstRAM module) and the MCM72JG64SG66 (a 512K byte pipelined
BurstRAM module).
• Low–Cost Asynchronous Solution for Triton Chip Set
• All Cache Data Inputs and Outputs are LVTTL (3.3 V I/O) Compatible
• All Tag I/Os are TTL Compatible
• Byte Write Capability
• Fast SRAM Access Times:15 ns for Data RAMs and Tag RAM
• Decoupling Capacitors for each Fast Static RAM and Logic Device
• High Quality Multi–Layer FR4 PWB With Separate Power and Ground
Planes
• 160 Pin Card Edge Module
• Burndy Connector, Part Number: CELP2X80SC3Z48
Order this document
by MCM64AF32/D
MCM64AF32
160–LEAD
CARD EDGE
CASE TBD*
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BurstRAM is a trademark of Motorola.
Pentium is a trademark of Intel Corp.
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
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MCM64AF32
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