MCM6246 Datasheet, PDF (1/8 Pages) Motorola, Inc – 512K x 8 Bit Static Random Access Memory

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
512K x 8 Bit Static Random
Access Memory
The MCM6246 is a 4,194,304 bit static random access memory organized as
524,288 words of 8 bits. Static design eliminates the need for external clocks or
timing strobes, while CMOS circuitry reduces power consumption and provides
for greater reliability.
The MCM6246 is equipped with chip enable (E) and output enable (G) pins,
allowing for greater system flexibility and eliminating bus contention problems.
Either input, when high, will force the outputs into high impedance.
The MCM6246 is available in a 400 mil, 36–lead surface–mount SOJ package.
• Single 5 V ± 10% Power Supply
• Fast Access Time: 17/20/25/35 ns
• Equal Address and Chip Enable Access Time
• All Inputs and Outputs are TTL Compatible
• Three–State Outputs
• Power Operation: 205/200/185/170 mA Maximum, Active AC
BLOCK DIAGRAM
A
A
A
A
A
A
ROW
DECODER
MEMORY MATRIX
1024 ROWS x
4096 COLUMNS
A
A
A
A
DQ
COLUMN I/O
INPUT
DATA
CONTROL
COLUMN DECODER
DQ
A A A A A AAA A
DQ
E
W
G
DQ
Order this document
by MCM6246/D
MCM6246
WJ PACKAGE
400 MIL SOJ
CASE 893–01
PIN ASSIGNMENT
A1
A2
A3
A4
A5
E6
DQ 7
DQ 8
VCC 9
VSS 10
DQ 11
DQ 12
W 13
A 14
A 15
A 16
A 17
A 18
36 NC
35 A
34 A
33 A
32 A
31 G
30 DQ
29 DQ
28 VSS
27 VCC
26 DQ
25 DQ
24 A
23 A
22 A
21 A
20 A
19 NC
PIN NAMES
A . . . . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
DQ . . . . . . . . . . . . . . . Data Input/Output
NC . . . . . . . . . . . . . . . . . No Connection
VCC . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
REV 5
6/9/97
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MCM6246
1