MCM6208C Datasheet, PDF (1/8 Pages) Motorola, Inc – 64K x 4 Fast Static RAM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
64K x 4 Fast Static RAM
The MCM6208C is fabricated using Motorola’s high–performance silicon–gate
CMOS technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.
This device meets JEDEC standards for functionality and pinout, and is avail-
able in plastic dual–in–line and plastic small–outline J–leaded packages.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• Fast Access Times: 12, 15, 20, 25, and 35 ns
• Equal Address and Chip Enable Access Times
• Low Power Operation: 135 –165 mA Maximum AC
• Fully TTL Compatible — Three–State Output
BLOCK DIAGRAM
A1
A2
VCC
A3
VSS
A4
MEMORY ARRAY
A6
ROW
DECODER
256 ROWS x
64 x 4 COLUMNS
A12
A13
A14
DQ0
INPUT
DQ1
DATA
DQ2
CONTROL
COLUMN I/O
COLUMN DECODER
DQ3
A0 A5 A7 A8 A9 A10 A11 A15
E
W
Order this document
by MCM6208C/D
MCM6208C
P PACKAGE
300 MIL PLASTIC
CASE 724A–01
J PACKAGE
300 MIL SOJ
CASE 810A–02
PIN ASSIGNMENT
A0 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
A9 10
E 11
VSS 12
24 VCC
23 A15
22 A14
21 A13
20 A12
19 A11
18 A10
17 DQ0
16 DQ1
15 DQ2
14 DQ3
13 W
PIN NAMES
A0 – A15 . . . . . . . . . . . . . Address Input
DQ0 – DQ3 . . . Data Input/Data Output
W . . . . . . . . . . . . . . . . . . . . Write Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
VCC . . . . . . . . . . . Power Supply (+ 5 V)
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
NC . . . . . . . . . . . . . . . . . No Connection
REV 4
6/95
M^© O^MoT^toO^roR^la,O^InL^c.A¹⁹F⁹⁴AST SRAM
MCM6208C
1