MCM6206D Datasheet, PDF (1/8 Pages) Motorola, Inc – 32K x 8 Bit Fast Static RAM

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
32K x 8 Bit Fast Static RAM
The MCM6206D is fabricated using Motorola’s high–performance silicon–gate
CMOS technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.
This device meets JEDEC standards for functionality and pinout, and is avail-
able in plastic dual–in–line and plastic small–outline J–leaded packages.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• Fast Access Times: 12, 15, 20, and 25 ns
• Equal Address and Chip Enable Access Times
• Output Enable (G) Feature for Increased System Flexibility and to
Eliminate Bus Contention Problems
• Low Power Operation: 125 – 140 mA Maximum AC
• Fully TTL Compatible — Three State Output
BLOCK DIAGRAM
A1
VCC
A3
VSS
A4
A6
MEMORY MATRIX
ROW
256 ROWS x
A7
DECODER
128 x 8 COLUMNS
A8
A9
A11
DQ0
INPUT ^...
COLUMN I/O
DATA
DQ7
CONTROL
COLUMN DECODER
E
A0 A2 A5 A10 A12 A13 A14
W
G
Order this document
by MCM6206D/D
MCM6206D
P PACKAGE
300 MIL PLASTIC
CASE 710B–01
J PACKAGE
300 MIL SOJ
CASE 810B–03
PIN ASSIGNMENT
A14 ₁
A12 ²
A7 ³
A6 ⁴
A5 ⁵
A4 ⁶
A3 ⁷
A2 ⁸
A1 ⁹
A0 ¹⁰
DQ0 ¹¹
DQ1 ¹²
DQ2 ¹³
VSS ¹⁴
28 VCC
27 W
26 _A13
25 _A8
24 _A9
23 _A11
22 _G
21 _A10
20 _E
19 _DQ7
18 _DQ6
17 _DQ5
16 _DQ4
15 _DQ3
PIN NAMES
A0 – A14 . . . . . . . . . . . . . Address Input
DQ0 – DQ7 . . . Data Input/Data Output
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
VCC . . . . . . . . . . . Power Supply (+ 5 V)
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
REV 1
5/95
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MCM6206D
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