MCM36F8 Datasheet, PDF (1/11 Pages) Motorola, Inc – 1MB and 2MB Synchronous Fast Static RAM Module

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
1MB and 2MB Synchronous
Fast Static RAM Module
The MCM36F8 (1MB) is configured as 256K x 36 bits and the MCM36F9 (2MB)
is configured as 512K x 36 bits. Both are packaged in a 144–pin dual–in–line
memory module (DIMM). Each module uses Motorola’s 3.3 V 256K x 18 bit flow–
through BurstRAMs.
Address (A), data inputs (DQ, DP), and all control signals except output enable
(G) are clock (K) controlled through positive–edge–triggered noninverting
registers.
Write cycles are internally self–timed and initiated by the rising edge of the
clock (K) input. This feature provides increased timing flexibility for incoming
signals. Synchronous byte write (BWx) and global byte write (WE) allows writes
to either individual bytes or to both bytes.
• Single 3.3 V + 10%, – 5% Power Supply
• Multiple Clock Pins for Reduced Loading
• All Inputs and Outputs are LVTTL Compatible
• Byte Write and Global Write Capability
• Fast SRAM Access Times: 10 ns
• Berg Connector, Part Number: 61178–31844
• 144–Pin DIMM Module
Order this document
by MCM36F8/D
MCM36F8
MCM36F9
144–LEAD DIMM
CASE 1154–01
TOP VIEW
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This document contains information on a new product. Specifications and information herein are subject to change without notice.
2/10/98
©_MM_Oo_Tto_Orol_Ra,_OInc_L._A19_F98_{AST SRAM}
MCM36F8•MCM36F9
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