MCM101525 Datasheet, PDF (1/8 Pages) Motorola, Inc – 2M x 2 Bit Fast Static Random Access Memory with ECL I/O

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
2M x 2 Bit Fast Static
Random Access Memory with
ECL I/O
The MCM101525 is a 4,194,304 bit static random access memory organized
as 2,097,152 words of 2 bits. This device features complementary outputs. This
circuit is fabricated using high performance silicon–gate BiCMOS technology.
Asynchronous design eliminates the need for external clocks or timing strobes.
The MCM101525 is available in a 400 mil, 36 lead TAB.
• Fast Access Times: 12, 15 ns
• Equal Address and Chip Select Access Time
• Power Operation: – 195 mA Maximum, Active AC
BLOCK DIAGRAM
A17
A16
VEE
A15
VCC
A14
A13
A12
ROW
DECODER
MEMORY MATRIX
1024 ROWS x
4096 COLUMNS
A11
A10
A9
A8
D0
D1
Q0
Q0
Q1
Q1
S
W
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
A20 A19 A18 A7 A6 A5 A4 A3 A2 A1 A0
Q0
Q0
Q1
Q1
Order this document
by MCM101525/D
MCM101525
TB PACKAGE
400 MIL TAB
CASE 984A–01
PIN ASSIGNMENT
A10 1
A11 2
A12 3
A13 4
A14 5
S6
D0 7
Q0 8
VCC 9
VEE 10
Q0 11
VEE ₁₂
W 13
A0 14
A15 15
A16 16
A17 17
A18 18
36 A1
35 A2
34 A3
33 A8
32 A19
31 NC
30 A20
29 Q1
28 VEE
27 VCC
26 Q1
25 D1
24 NC
23 A9
22 A4
21 A5
20 A6
19 A7
PIN NAMES
A0 – A20 . . . . . . . . . . . . . Address Inputs
S . . . . . . . . . . . . . . . . . . . . . . . Chip Select
Q0 – Q1 . . . . . . . . . . . . . . . . Data Output
NC . . . . . . . . . . . . . . . . . . No Connection
VCC . . . . . . . . . . . . . . . . . . . . . . . . Ground
W . . . . . . . . . . . . . . . . . . . . . Write Enable
D0 – D1 . . . . . . . . . . . . . . . . . . Data Input
Q0 and Q1 . . Complementary Data Out
VEE . . . . . . . . . . . . . . . . . . Power Supply
This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
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MCM101525
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