MC9S12B Datasheet, PDF (1/12 Pages) Motorola, Inc – 16-Bit Microcontroller

MOTOROLA ^{Freescale Semiconductor, Inc.}
SEMICONDUCTOR
TECHNICAL DATA
HCS12BFAMILYPP
Rev 2.7, 17-Mar-04
MC9S12B-Family
PRODUCT BRIEF
16-Bit Microcontroller
Designed for automotive multiplexing applications, members of the MC9S12B-Family of 16 bit Flash-
based microcontrollers are fully pin compatible and enable users to choose between different memory
and peripheral options for scalable designs. All MC9S12B-Family members are composed of standard
on-chip peripherals including a 16-bit central processing unit (CPU12), up to 256K bytes of Flash
EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications
interfaces (SCI), serial peripheral interface (SPI), an input capture/output compare timer (TIM), 16-
channel, 10-bit analog-to-digital converter (ADC), an 8-channel pulse-width modulator (PWM), one
CAN 2.0 A, B software compatible module (MSCAN12) and an Inter-IC Bus. System resource mapping,
clock generation, interrupt control and bus interfacing are managed by the lite integration module (LIM).
The MC9S12B-Family has full 16-bit data paths throughout, however, the external bus can operate in
an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The
inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational
requirements. In addition to the I/O ports available in each module, up to 22 I/O ports are available with
Wake-Up capability from STOP or WAIT mode.
Features
NOTE
Not all features listed here are available in all configurations.
Additional information about D and B family inter-operability is given in:
EB386 “HCS12 D-Family Compatibility Considerations” and
EB388 “Using the HCS12 D_Family as a development platform for the HCS12 B family”
• 16-bit CPU12
— Upward compatible with M68HC11 instruction set
— Interrupt stacking and programmer’s model identical to M68HC11
— 20-bit ALU
— Instruction queue
— Enhanced indexed addressing
• Multiplexed bus
— Single chip or expanded
— 16 address/16 data wide or 16 address/8 data narrow modes
— External address space 1MByte for Data and Program space (112 pin package only)
• Wake-up interrupt inputs depending on the package option
— 8-bit port H
— 4-bit port J
— 8-bit port P shared with PWM
• Memory options
— 64K, 128K, 256K Byte Flash EEPROM
— 1K, 2K Byte EEPROM
— 2K, 4K and 8K Byte RAM
This document contains information on a new product. Specifications and information herein are subject to change without notice.
© MOTOROLA 2002
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