MC88914 Datasheet, PDF (1/4 Pages) Motorola, Inc – LOW SKEW CMOS CLOCK DRIVER WITH RESET

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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Low Skew CMOS
Clock Driver With Reset
The MC88914 is a high–speed, low power, hex divide–by–two D–type
flip–flop with matched propagation delays, an internal power–on–reset,
and external synchronous reset. With TTL compatible buffered clock and
external reset inputs that are common to all flip–flops, the MC88914 is
ideal for use in high–frequency systems as a clock driver, providing
multiple outputs that are synchronous.
• Power–on–Reset and External Synchronous Reset
• TTL Compatible Positive Edge–Triggered Clock
• Matched Outputs for Synchronous Applications
• Outputs Source/Sink 24mA
• Part–to–Part Skew of Less Than 3.0ns
• Guaranteed Rise and Fall Times for a Given Capacitive Load
Pinout: 14–Lead Plastic (Top View)
VCC GND Q5 Q4 Q3 SR GND
14 13 12 11 10 9 8
MC88914
LOW SKEW CMOS
CLOCK DRIVER
WITH RESET
14
1
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
1234567
VCC GND Q0 Q1 Q2 CLK GND
14
1
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
SR
POWER–ON
RESET
CLK
LOGIC DIAGRAM
CLK D
RST
Q
CLK D
RST
Q
CLK D
RST
Q
CLK D
RST
Q
CLK D
RST
Q
CLK D
RST
Q
Q0
Q1
Q2
Q3
Q4
Q5
NOTE: This diagram is provided only for understanding of logic operation and should not be used to estimate propagation delays
8/95
© Motorola, Inc. 1995
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