MC74LVX125 Datasheet, PDF (1/6 Pages) Motorola, Inc – LOW-VOLTAGE CMOS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad Bus Buffer
With 5V-Tolerant Inputs
The MC74LVX125 is an advanced high speed CMOS quad bus buffer.
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
The MC74LVX125 requires the 3–state control input (OE) to be set
High to place the output into the high impedance state.
• High Speed: tPD = 4.4ns (Typ) at VCC = 3.3V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: VOLP = 0.5V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
VCC OE3 D3 O3 OE2 D2 O2
14 13 12 11 10 9 8
MC74LVX125
LVX
LOW–VOLTAGE CMOS
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
1234567
OE0 D0 O0 OE1 D1 O1 GND
Figure 1. 14–Lead Pinout (Top View)
1
OE0
2
D0
4
OE1
5
D1
3
O0
6
O1
10
OE2
9
D2
13
OE3
12
D3
Figure 2. Logic Diagram
8
O2
11
O3
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
PIN NAMES
Pins
Function
OEn
Dn
On
Output Enable Inputs
Data Inputs
3–State Outputs
FUNCTION TABLE
INPUTS
OEn
Dn
L
L
L
H
H
X
OUTPUTS
On
L
H
Z
H = High Voltage Level; L = Low Voltage Level; Z = High Imped-
ance State; X = High or Low Voltage Level and Transitions Are
Acceptable, for ICC reasons, DO NOT FLOAT Inputs
6/97
© Motorola, Inc. 1997
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