MC74LCX2952 Datasheet, PDF (1/10 Pages) Motorola, Inc – LOW-VOLTAGE CMOS OCTAL REGISTERED TRANSCEIVER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage CMOS Octal
Registered Transceiver With
Dual Output and Clock
Enables
With 5V-Tolerant Inputs and Outputs
(3-State, Non-Inverting)
The MC74LCX2952 is a high performance, non–inverting octal
registered transceiver operating from a 2.7 to 3.6V supply. High
impedance TTL compatible inputs significantly reduce current loading to
input drivers while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5V allows MC74LCX2952 inputs to
be safely driven from 5V devices. The MC74LCX2952 is suitable for
memory address driving and all TTL level bus oriented transceiver
applications.
Two 8–bit back to back registers store data from either of two
bidirectional buses. Data applied to the inputs is entered and stored on
the rising edge of the Clock (CAB, CBA) provided that the Clock Enable
(CEAB, CEBA) is Low. The data is then presented at the 3–state output
buffers, but is only accessible when the Output Enable (OEAB, OEBA) is
Low. The operation of the MC74LCX2952 is symmetrical — A inputs to B
outputs occurs in the same manner as B inputs to A outputs.
MC74LCX2952
LOW–VOLTAGE CMOS
OCTAL REGISTERED
TRANSCEIVER
DW SUFFIX
24–LEAD PLASTIC SOIC WIDE PACKAGE
CASE 751E–04
• Designed for 2.7 to 3.6V VCC Operation
• 5V Tolerant — Interface Capability With 5V TTL Logic
• Supports Live Insertion and Withdrawal
• IOFF Specification Guarantees High Impedance When VCC = 0V
• LVTTL Compatible
• LVCMOS Compatible
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V; Machine Model >200V
VCC A7 A6 A5 A4 A3 A2 A1 A0 OEBA CBA CEBA
24 23 22 21 20 19 18 17 16 15 14 13
SD SUFFIX
24–LEAD PLASTIC SSOP PACKAGE
CASE 940D–03
DT SUFFIX
24–LEAD PLASTIC TSSOP PACKAGE
CASE 948H–01
PIN NAMES
Pins
A0–A7
B0–B7
CAB, CBA
CEAB, CEBA
OEAB, OEBA
Function
Side A Inputs/Outputs
Side B Inputs/Outputs
Clock Pulse Inputs
Clock Enable Inputs
Output Enable Inputs
1 2 3 4 5 6 7 8 9 10 11 12
B7 B6 B5 B4 B3 B2 B1 B0 OEAB CAB CEAB GND
Figure 1. 24–Lead Pinout (Top View)
3/97
© Motorola, Inc. 1997
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