MC74HCT240A Datasheet, PDF (1/7 Pages) Motorola, Inc – Octal 3-State Inverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Inverting Buffer/
Line Driver/Line Receiver with
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
The MC74HCT240A is identical in pinout to the LS240. This device may
be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs. The HCT240A is an octal inverting buffer line
driver line receiver designed to be used with 3–state memory address
drivers, clock drivers, and other bus–oriented systems. The device has
inverting outputs and two active–low output enables.
The HCT240A is the inverting version of the HCT244. See also HCT241.
• Output Drive Capability: 15 LSTTL Loads
• TTL NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 110 FETs or 27.5 Equivalent Gates
A1 ²
A2 ⁴
A3 ⁶
DATA INPUTS
A4 ⁸
B1 ¹¹
B2 ¹³
B3 ¹⁵
B4 ¹⁷
LOGIC DIAGRAM
18 _YA1
16 _YA2
14 _YA3
12 _YA4
9 _YB1
7 _YB2
5 _YB3
3 _YB4
INVERTING
OUTPUTS
OUTPUT ENABLE A ¹
ENABLES _{ENABLE B} ¹⁹
PIN 20 = VCC
PIN 10 = GND
MC74HCT240A
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
ORDERING INFORMATION
MC74HCTXXXAN
MC74HCTXXXADW
MC74HCTXXXASD
MC74HCTXXXADT
Plastic
SOIC
SSOP
TSSOP
PIN ASSIGNMENT
ENABLE A 1
A1 2
YB4 3
A2 4
YB3 5
A3 6
YB2 7
A4 8
YB1 9
GND 10
20 VCC
19 ENABLE B
18 YA1
17 B4
16 YA2
15 B3
14 YA3
13 B2
12 YA4
11 B1
FUNCTION TABLE
Inputs
Enable A,
Enable B A, B
Outputs
YA, YB
L
L
H
L
H
L
H
X
Z
Z = High Impedance
X = Don’t Care
2/97
© Motorola, Inc. 1997
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