MC54HC573A Datasheet, PDF (1/7 Pages) Motorola, Inc – Octal 3-State Noninverting Transparent Latch

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Transparent Latch
High–Performance Silicon–Gate CMOS
The MC54/74HC573A is identical in pinout to the LS573. The devices are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes low,
data meeting the setup and hold time becomes latched.
The HC573A is identical in function to the HCT373A but has the data
inputs on the opposite side of the package from the outputs to facilitate PC
board layout.
The HC573A is the noninverting version of the HC563A.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 218 FETs or 54.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 ²
D1 ³
D2 ⁴
D3 ⁵
D4 ⁶
D5 ⁷
D6 ⁸
D7 ⁹
LATCH ENABLE ¹¹
OUTPUT ENABLE ¹
19 _Q0
18 _Q1
17 _Q2
16 _Q3
15 _Q4
14 _Q5
13 _Q6
12 _Q7
NONINVERTING
OUTPUTS
PIN 20 = VCC
PIN 10 = GND
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Design Criteria}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Count*}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Internal Gate Propagation Delay}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{Internal Gate Power Dissipation}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Speed Power Product}
Value Units
54.5
ea.
1.5
ns
5.0
µW
0.0075 pJ
* Equivalent to a two–input NAND gate.
MC54/74HC573A
20
1
20
1
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXADW
MC74HCXXXADT
Ceramic
Plastic
SOIC
TSSOP
PIN ASSIGNMENT
OUTPUT
ENABLE
1
D0 2
20 VCC
19 Q0
D1 3
18 Q1
D2 4
17 Q2
D3 5
16 Q3
D4 6
15 Q4
D5 7
14 Q5
D6 8
13 Q6
D7 9
GND 10
12 Q7
11 ^LATCH
ENABLE
FUNCTION TABLE
Inputs
Output
Output Latch
Enable Enable D
Q
L
H
H
H
L
H
L
L
L
L
X No Change
H
X
X
Z
X = Don’t Care
Z = High Impedance
10/96
© Motorola, Inc. 1996
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