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| MC54F280 Datasheet, PDF (1/3 Pages) Motorola, Inc – 9-BIT PARITY GENERATOR/CHECKER | |||
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9-BIT PARITY GENERATOR/
CHECKER
The MC54/74F280 is a high-speed parity generator/checker that accepts
nine bits of input data and detects whether an even or an odd number of these
inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is
HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd
output is the complement of the Sum Even output.
CONNECTION DIAGRAM
VCC I5 I4 I3 I2 I1 I0
14 13 12 11 10 9 8
MC54/74F280
9-BIT PARITY
GENERATOR/CHECKER
FAST⢠SCHOTTKY TTL
14
1
J SUFFIX
CERAMIC
CASE 632-08
1234567
I6 I7 NC I8 âE âO GND
LOGIC DIAGRAM
I8 I7 I6
I5 I4 I3
I2 I1 I0
ΣO
ΣE
NOTE:
This diagram is provided only for the understanding of logic operations and should not
be used to estimate propagation delays.
FAST AND LS TTL DATA
4-143
14
1
N SUFFIX
PLASTIC
CASE 646-06
14
1
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
MC54FXXXJ
MC74FXXXN
MC74FXXXD
Ceramic
Plastic
SOIC
LOGIC SYMBOL
8 9 10 11 12 13 1 2 4
I0 I1 I2 I3 I4 I5 I6 I7 I8
ΣO ΣE
65
VCC = PIN 14
GND = PIN 7
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