MC5474HC534A Datasheet, PDF (1/6 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State
Inverting D Flip-Flop
High–Performance Silicon–Gate CMOS
The MC54/74HC534A is identical in pinout to the LS534. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
Data meeting the setup time is clocked, in inverted form, to the outputs
with the rising edge of the Clock. The Output Enable input does not affect the
states of the flip–flops, but when Output Enable is high, the outputs are
forced to the high impedance state. Thus, data may be stored even when the
outputs are not enabled.
The HC534A is identical in function to the HC564 which has the data
inputs on the opposite side of the package from the outputs to facilitate PC
board layout.
This device is similar in function to the HC374A, which has noninverting
outputs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 282 FETs or 68.5 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 ³
D1 ⁴
D2 ⁷
D3 ⁸
D4 ¹³
D5 ¹⁴
D6 ¹⁷
D7 ¹⁸
CLOCK ¹¹
2 _Q0
5 _Q1
6 _Q2
9 _Q3
12 _Q4
15 _Q5
16 _Q6
19 _Q7
INVERTING
OUTPUTS
OUTPUT ENABLE ¹
PIN 20 = VCC
PIN 10 = GND
MC54/74HC534A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXADW
Ceramic
Plastic
SOIC
PIN ASSIGNMENT
OUTPUT
ENABLE
1
Q0 2
20 VCC
19 Q7
D0 3
18 D7
D1 4
17 D6
Q1 5
16 Q6
Q2 6
15 Q5
D2 7
14 D5
D3 8
13 D4
Q3 9
12 Q4
GND 10
11 CLOCK
FUNCTION TABLE
Inputs
Output
Output
Enable Clock D
Q
L
L
L
L,H,
H
X
H
L
L
H
X No Change
X
Z
X = Don’t Care
Z = High Impedance
10/95
© Motorola, Inc. 1995
3–1
REV 6