MC5474HC27 Datasheet, PDF (1/5 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple 3-Input NOR Gate
High–Performance Silicon–Gate CMOS
The MC54/74HC27 is identical in pinout to the LS27. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 42 FETs or 10.5 Equivalent Gates
LOGIC DIAGRAM
A1
B1
C1
1
2
13
12 _Y1
A2
B2
C2
3
4
5
6 _{Y2 Y = A + B + C}
A3
B3
C3
9
10
11
PIN 14 = VCC
PIN 7 = GND
8 _Y3
MC54/74HC27
14
1
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
14
1
14
1
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
D SUFFIX
SOIC PACKAGE
CASE 751A–03
ORDERING INFORMATION
MC54HCXXJ
MC74HCXXN
MC74HCXXD
Ceramic
Plastic
SOIC
PIN ASSIGNMENT
A1 1
B1 2
A2 3
B2 4
C2 5
Y2 6
GND 7
14 VCC
13 C1
12 Y1
11 C3
10 B3
9 A3
8 Y3
FUNCTION TABLE
Inputs
Output
A
B
C
Y
L
L
L
H
X
X
H
L
X
H
X
L
H
X
X
L
10/95
© Motorola, Inc. 1995
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