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MC54-74HCT373A Datasheet, PDF (1/8 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS | |||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Transparent Latch with
LSTTL-Compatible Inputs
HighâPerformance SiliconâGate CMOS
The MC54/74HCT373A may be used as a level converter for
interfacing TTL or NMOS outputs to HighâSpeed CMOS inputs.
The HCT373A is identical in pinout to the LS373.
The eight latches of the HCT373A are transparent Dâtype latches.
While the Latch Enable is high the Q outputs follow the Data Inputs. When
Latch Enable is taken low, data meeting the setup and hold times
becomes latched.
The Output Enable does not affect the state of the latch, but when
Output Enable is high, all outputs are forced to the highâimpedance state.
Thus, data may be latched even when the outputs are not enabled.
The HCT373A is identical in function to the HCT573A, which has the
input pins on the opposite side of the package from the output pins. This
device is similar in function to the HCT533A, which has inverting outputs.
⢠Output Drive Capability: 15 LSTTL Loads
⢠TTL/NMOSâCompatible Input Levels
⢠Outputs Directly Interface to CMOS, NMOS, and TTL
⢠Operating Voltage Range: 4.5 to 5.5 V
⢠Low Input Current: 1.0 µA
⢠In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
⢠Chip Complexity: 196 FETs or 49 Equivalent Gates
LOGIC DIAGRAM
DATA
INPUTS
D0 3
D1 4
D2 7
D3 8
D4 13
D5 14
D6 17
D7 18
2 Q0
5 Q1
6 Q2
9 Q3
12 Q4
15 Q5
16 Q6
19 Q7
NONINVERTING
OUTPUTS
LATCH ENABLE 11
OUTPUT ENABLE 1
PIN 20 = VCC
PIN 10 = GND
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Design Criteria
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Internal Gate Count*
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Internal Gate Propagation Delay
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Internal Gate Power Dissipation
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Speed Power Product
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ * Equivalent to a twoâinput NAND gate.
Value
49
1.5
5.0
.0075
Units
ea.
ns
µW
pJ
2/97
© Motorola, Inc. 1997
1
MC54/74HCT373A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732â03
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738â03
DW SUFFIX
SOIC PACKAGE
CASE 751Dâ04
20
1
SD SUFFIX
SSOP PACKAGE
CASE 940Câ03
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948Eâ02
ORDERING INFORMATION
MC54HCTXXXAJ
Ceramic
MC74HCTXXXAN
Plastic
MC74HCTXXXADW SOIC
MC74HCTXXXASD SSOP
MC74HCTXXXADT TSSOP
PIN ASSIGNMENT
OUTPUT 1
ENABLE
Q0 2
D0 3
20 VCC
19 Q7
18 D7
D1 4
17 D6
Q1 5
Q2 6
D2 7
16 Q6
15 Q5
14 D5
D3 8
13 D4
Q3 9
GND 10
12 Q4
11 LATCH
ENABLE
FUNCTION TABLE
Inputs
Output
Output Latch
Enable Enable D
Q
L
H
H
H
L
H
L
L
L
L
X No Change
H
X
X
Z
X = donât care
Z = high impedance
REV 7
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