MC54-74HCT241A Datasheet, PDF (1/7 Pages) Motorola, Inc – High–Performance Silicon–Gate CMOS

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver with
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
MC54/74HCT241A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
The MC54/74HCT241A is identical in pinout to the LS241. This device
may be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs. The HCT241A is an octal noninverting buffer/line
driver/line receiver designed to be used with 3–state memory address
drivers, clock drivers, and other bus–oriented systems. The device has
non–inverted outputs and two output enables. Enable A is active–low and
Enable B is active–high.
The HCT241A is similar in function to the HCT244. See also HCT240.
• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 118 FETs or 29.5 Equivalent Gates
LOGIC DIAGRAM
A1 ²
A2 ⁴
A3 ⁶
DATA INPUTS
A4 ⁸
B1 ¹¹
18 _YA1
16 _YA2
14 _YA3
12 _YA4
NONINVERTING
9 _YB1 ^OUTPUTS
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
ORDERING INFORMATION
MC54HCTXXXAJ Ceramic
MC74HCTXXXAN Plastic
MC74HCTXXXADW SOIC
PIN ASSIGNMENT
ENABLE A 1
A1 2
YB4 3
A2 4
YB3 5
A3 6
YB2 7
A4 8
YB1 9
GND 10
20 VCC
19 ENABLE B
18 YA1
17 B4
16 YA2
15 B3
14 YA3
13 B2
12 YA4
11 B1
B2 ¹³
B3 ¹⁵
B4 ¹⁷
OUTPUT ENABLE A ¹
ENABLES _{ENABLE B} ¹⁹
7 _YB2
5 _YB3
3 _YB4
PIN 20 = VCC
PIN 10 = GND
FUNCTION TABLE
Inputs
Enable A A
Output
YA
L
L
L
L
H
H
H
X
Z
Inputs
Enable B B
H
L
H
H
L
X
Output
YB
L
H
Z
Z = high impedance
X = don’t care
2/97
© Motorola, Inc. 1997
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