MC54-74HC244A Datasheet, PDF (1/8 Pages) Motorola, Inc – Octal 3-State Noninverting Buffer/Line Driver/Line Receiver

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver
High–Performance Silicon–Gate CMOS
The MC54/74HC244A is identical in pinout to the LS244. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
This octal noninverting buffer/line driver/line receiver is designed to be
used with 3–state memory address drivers, clock drivers, and other
bus–oriented systems. The device has noninverting outputs and two
active–low output enables.
The HC244A is similar in function to the HC240A and HC241A.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 136 FETs or 34 Equivalent Gates
LOGIC DIAGRAM
MC54/74HC244A
20
1
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
ORDERING INFORMATION
MC54HCXXXAJ
Ceramic
MC74HCXXXAN
Plastic
MC74HCXXXADW SOIC
MC74HCXXXASD SSOP
MC74HCXXXADT TSSOP
A1 ²
A2 ⁴
A3 ⁶
DATA
INPUTS
A4 ⁸
B1 ¹¹
B2 ¹³
B3 ¹⁵
B4 ¹⁷
OUTPUT ENABLE A ¹
ENABLES _{ENABLE B} ¹⁹
18 _YA1
16 _YA2
14 _YA3
12 _YA4
NONINVERTING
9 _YB1 ^OUTPUTS
7 _YB2
5 _YB3
3 _YB4
PIN 20 = VCC
PIN 10 = GND
PIN ASSIGNMENT
ENABLE A 1
A1 2
YB4 3
A2 4
YB3 5
A3 6
YB2 7
A4 8
YB1 9
GND 10
20 VCC
19 ENABLE B
18 YA1
17 B4
16 YA2
15 B3
14 YA3
13 B2
12 YA4
11 B1
FUNCTION TABLE
Inputs
Enable A,
Enable B A, B
L
L
L
H
H
X
Outputs
YA, YB
L
H
Z
Z = high impedance
2/97
© Motorola, Inc. 1997
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