MC3456 Datasheet, PDF (1/10 Pages) ON Semiconductor – DUAL TIMING CIRCUIT

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Dual Timing Circuit
The MC3456 dual timing circuit is a highly stable controller capable of
producing accurate time delays, or oscillation. Additional terminals are
provided for triggering or resetting if desired. In the time delay mode of
operation, the time is precisely controlled by one external resistor and
capacitor per timer. For astable operation as an oscillator, the free running
frequency and the duty cycle are both accurately controlled with two external
resistors and one capacitor per timer. The circuit may be triggered and reset
on falling waveforms, and the output structure can source or sink up to
200 mA or drive MTTL circuits.
• Direct Replacement for NE556/SE556 Timers
• Timing from Microseconds through Hours
• Operates in Both Astable and Monostable Modes
• Adjustable Duty Cycle
• High Current Output can Source or Sink 200 mA
• Output can Drive MTTL
• Temperature Stability of 0.005% per °C
• Normally “On” or Normally “Off” Output
• Dual Version of the Popular MC1455 Timer
MC3456
DUAL TIMING CIRCUIT
SEMICONDUCTOR
TECHNICAL DATA
P SUFFIX
PLASTIC PACKAGE
CASE 646
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–14)
PIN CONNECTIONS
Figure 1. 22 Second Solid State Time Delay Relay Circuit
10 k
0.1 µF
5
0.01 µF
1.0 k
38
4
2 ^1/2
MC3456
6 _{R 20 M}
7
MT2
Load
G ^MT1
1 ^{1.0 µF C}
–10 V
1N4003
t = 1.1; R and C = 22 sec
Time delay (t) is variable by
changing R and C (see Figure 16).
1N4740
3.5 k –
250 V
10
+
µF
Figure 3. General Test Circuit
Discharge A 1
Threshold A 2
Control A 3
Reset A 4
Output A 5
Trigger A 6
Gnd 7
14 VCC
13 Discharge B
12 Threshold B
11 Control B
10 Reset B
9 Output B
8 Trigger B
(Top View)
ORDERING INFORMATION
Device
Operating
Temperature Range
Package
MC3456P
NE556D
0° to +70°C
Plastic DIP
SO–14
VR
ICC
VCC
+
0.01 µF
VO
Reset 4 8
700
5
Control
Voltage
VCC ⁷
Discharge
1/2
3
Output
ISink
ISource
MC3456
Gnd
12
Threshold
6 _Ith
Trigger
2.0 k ^VS
2 (12)
Threshold
3 (11)
Control Voltage
Test circuit for measuring DC parameters (to set output and measure parameters):
w a) When VS 2/3 VCC, VO is low.
v b) When VS 1/3 VCC, VO is high.
c) When VO is low, Pin 7 sinks current. To test for Reset, set VO high,
c) apply Reset voltage, and test for current flowing into Pin 7. When Reset
c) is not in use, it should be tied to VCC.
6 (8)
Trigger
Figure 2. Block Diagram (1/2 Shown)
VCC
14
5k
+
Comp
–A
5k
+
Comp
–B
5k
Flip
R _Flop
Q
S ^Inhibit/
Reset
1 (13)
Discharge
5 (9)
Output
7
Gnd
4 (10)
Reset
MOTOROLA ANALOG IC DEVICE DATA
© Motorola, Inc. 1996
Rev 2
1