MC14561B Datasheet, PDF (1/8 Pages) Motorola, Inc – 9S COMPLEMENTER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14561B
9's Complementer
The MC14561B 9’s complementer is a companion to the MC14560B
NBCD adder to allow BCD subtraction. A BCD number (8–4–2–1 code) is
applied to the inputs (A1 = 20, A2 = 21, A3 = 22, A4 = 23). If the complement
control (Comp) is low, the BCD number appears at the outputs unmodified.
The complement disable (Comp) allows the complement control to be gated,
or an inverted control signal to be used. If the complement input is high and
the disable input low, the 9’s complement of the number is displayed at the
outputs. The zero control (Z), when high, forces the outputs low regardless of
the state of the other inputs.
When the MC14561B is used to perform BCD subtraction in conjunction
with the MC14560B NBCD adder, the complement control becomes an
add/subtract control.
• All Inputs Buffered
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Schottky TTL Load Over the Rated Temperature Range}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
Z Comp Comp F1
0
0
0
0
0
1
A1
0
1
1
0
1
0 A1
1
X
X
0
X = Don’t Care.
TRUTH TABLE
F2
F3
F4
Mode
A2
A3
A4 Straight–through
A2 A2A3 + A2A3 A2A3A4
0
0
0
Complement
Zero
L SUFFIX
CERAMIC
CASE 632
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
A1 1
A2 2
A3 3
A4 4
COMP 5
COMP 6
VSS 7
14 VDD
13 F1
12 F2
11 F3
10 F4
9Z
8 NC
NC = NO CONNECTION
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
v v ^{operation, Vin and Vout should be constrained}
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs must be left open.
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14561B
1