MC14560B Datasheet, PDF (1/13 Pages) Motorola, Inc – NBCD Adder

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
NBCD Adder
The MC14560B adds two 4–bit numbers in NBCD (natural binary coded
decimal) format, resulting in sum and carry outputs in NBCD code.
This device can also subtract when one set of inputs is complemented with
a 9’s Complementer (MC14561B).
All inputs and outputs are active high. The carry input for the least
significant digit is connected to VSS for no carry in.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ • Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE*
Input
Output
A4 A3 A2 A1 B4 B3 B2 B1 Cin Cout S4 S3 S2 S1
00000000 0 0 0000
00000000 1 0 0001
01000011 0 0 0111
01000011 1 0 1000
01110100 0 1 0001
01110100 1 1 0010
10000101 0 1 0011
01101000 0 1 0100
10011001 1 1 1001
* Partial truth table to show logic operation for representative input values.
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
MC14559B
See Page 398
MC14560B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
BLOCK DIAGRAM
7
Cin S1
13
15
A1
14
B1 S2
12
1
A2
2
B2 S3
11
3
A3
4
B3 S4
10
5
A4
6
B4 Cout
9
VDD = PIN 16
VSS = PIN 8
REV 30
1/94
©MMOotoTrOolaR, IOncL. A199C54MOS LOGIC DATA
MC14560B
1