MC14555B Datasheet, PDF (1/5 Pages) Motorola, Inc – Dual Binary to 1-of-4 Decoder/Demultiplexer

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Binary to 1-of-4
Decoder/Demultiplexer
The MC14555B and MC14556B are constructed with complementary
MOS (CMOS) enhancement mode devices. Each Decoder/Demultiplexer
has two select inputs (A and B), an active low Enable input (E), and four
mutually exclusive outputs (Q0, Q1, Q2, Q3). The MC14555B has the
selected output go to the “high” state, and the MC14556B has the selected
output go to the “low” state. Expanded decoding such as binary–to–hexade-
cimal (1–of–16), etc., can be achieved by using other MC14555B or
MC14556B devices.
Applications include code conversion, address decoding, memory selec-
tion control, and demultiplexing (using the Enable input as a data input) in
digital data transmission systems.
• Diode Protection on All Inputs
• Active High or Active Low Outputs
• Expandable
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• All Outputs Buffered
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ • Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
“P and D/DW” Packages: – 7.0 mW/C From 65_C To 125_C Ceramic
“L” Packages: – 12 mW/_C From 100_C To 125_C
MC14555B
BLOCK DIAGRAM
MC14556B
2
A
3
B
1
E
Q0
4
Q1
5
Q2
6
Q3
7
2
A
3
B
1
E
Q0
4
Q1
5
Q2
6
Q3
7
MC14555B
MC14556B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
TRUTH TABLE
Inputs
Enable Select
E BA
0 00
0 01
0 10
0 11
1 XX
X = Don’t Care
Outputs
MC14555B
MC14556B
Q3 Q2 Q1 Q0 Q3 Q2 Q1 Q0
0 0011110
0 0101101
0 1001011
1 0000111
0 0001111
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
v v ^{operation, Vin and Vout should be constrained}
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs must be left open.
14
A
13
B
15
E
Q0
12
Q1
11
Q2
10
Q3
9
14
A
13
B
15
E
VDD = PIN 16
VSS = PIN 8
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
Q0
12
Q1
11
Q2
10
Q3
9
MC14555B MC14556B
1