MC14532B Datasheet, PDF (1/8 Pages) Motorola, Inc – 8-BIT PRIORITY ENCODER

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
8-Bit Priority Encoder
The MC14532B is constructed with complementary MOS (CMOS)
enhancement mode devices. The primary function of a priority encoder is to
provide a binary address for the active input with the highest priority. Eight
data inputs (D0 thru D7) and an enable input (Ein) are provided. Five outputs
are available, three are address outputs (Q0 thru Q2), one group select (GS)
and one enable output (Eout).
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ • Capable of Driving Two Low–power TTL Loads or One Low–Power
Schottky TTL Load over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE
Input
Output
Ein D7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0 Eout
0 XXXXXXXX 0 0 0 0 0
1 000000000000 1
1 1XXXXXXX 1 1 1 1 0
1 0 1XXXXXX 1 1 1 0 0
1 0 0 1XXXXX 1 1 0 1 0
1 0 0 0 1XXXX 1 1 0 0 0
1 0 0 0 0 1XXX 1 0 1 1 0
1 0 0 0 0 0 1XX 1 0 1 0 0
1 0000001X1 001 0
1 000000011000 0
X = Don’t Care
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14532B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
D4 1
D5 2
D6 3
D7 4
Ein 5
Q2 6
Q1 7
VSS 8
16 VDD
15 Eout
14 GS
13 D3
12 D2
11 D1
10 D0
9 Q0
MC14532B
1