MC14531B Datasheet, PDF (1/5 Pages) Motorola, Inc – 12-BIT PARITY TREE

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14531B
12-Bit Parity Tree
The MC14531B 12–bit parity tree is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure. The
circuit consists of 12 data–bit inputs (D0 thru D11), and even or odd parity
L SUFFIX
CERAMIC
CASE 620
selection input (W) and an output (Q). The parity selection input can be
considered as an additional bit. Words of less than 13 bits can generate an
even or odd parity output if the remaining inputs are selected to contain an
even or odd number of ones, respectively. Words of greater than 12–bits can
be accommodated by cascading other MC14531B devices by using the W
P SUFFIX
PLASTIC
CASE 648
input. Applications include checking or including a redundant (parity) bit to a
word for error detection/correction systems, controller for remote digital
sensors or switches (digital event detection/correction), or as a multiple input
summer without carries.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
D SUFFIX
SOIC
CASE 751B
• All Outputs Buffered
ORDERING INFORMATION
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ • Variable Word Length
• Diode Protection on All Inputs
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VDD DC Supply Voltage}
– 0.5 to + 18.0
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Iin, Iout Input or Output Current (DC or Transient),}
± 10
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ per Pin
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ PD Power Dissipation, per Package†
500
mW
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{Tstg Storage Temperature}
– 65 to + 150
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^TL
Lead Temperature (8–Second Soldering)
260
_C
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^{* Maximum Ratings are those values beyond which damage to the device may occur.}
†Temperature Derating:
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
TRUTH TABLE
Inputs
Output
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
Decimal
(Octal)
W D11 D10 … D2 D1 D0 Equivalent
Q*
D0 7
D1 6
D2 5
LOGIC DIAGRAM
0 0 0…0 0 0
0 (0)
0
0 0 0…0 0 1
1 (1)
1
0 0 0…0 1 0
2 (2)
1
0 0 0…0 1 1
3 (3)
0
0 0 0…1 0 0
4 (4)
1
0 0 0…1 0 1
5 (5)
0
0 0 0…1 1 0
6 (6)
0
0 0 0…1 1 1
7 (7)
1
D3 4
D4 3
*
*
*
*
*
*
*
*
*
*
*
*…*
*
*
*
*
*
*
*
*
*
*
*
*
*
D5 2
D6 1
D7 15
D8 14
D9 13
D10 12
D11 11
ODD/EVEN W 10
VDD = PIN 16
VSS = PIN 8
9Q
1 1 1. … 0 0 0 8184 (17770)
0
1 1 1 … 0 0 1 8185 (17771)
1
1 1 1 … 0 1 0 8186 (17772)
1
1 1 1 … 0 1 1 8187 (17773)
0
1 1 1 … 1 0 0 8188 (17774)
1
1 1 1 … 1 0 1 8189 (17775)
0
1 1 1 … 1 1 0 8190 (17776)
0
1 1 1 … 1 1 1 8191 (17777)
1
*0 = Even Parity
1 = Odd Parity
NOTE: May redefine to suit application by manipulating W and/or other
available D’s.
     Q = D0 D1 D2 @@@@ D11 W
REV 3
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©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14531B
1