MC14516B Datasheet, PDF (1/10 Pages) ON Semiconductor – Binary Up/Down Counter

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14516B
Binary Up/Down Counter
The MC14516B synchronous up/down binary counter is constructed with
MOS P–channel and N–channel enhancement mode devices in a monolithic
structure.
This counter can be preset by applying the desired value, in binary, to the
Preset inputs (P0, P1, P2, P3) and then bringing the Preset Enable (PE)
high. The direction of counting is controlled by applying a high (for up
counting) or a low (for down counting) to the UP/DOWN input. The state of
the counter changes on the positive transition of the clock input.
Cascading can be accomplished by connecting the Carry Out to the
Carry In of the next stage while clocking each counter in parallel. The
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high to the
reset (R) pin.
This CMOS counter finds primary use in up/down and difference counting.
Other applications include: (1) Frequency synthesizer applications where
low power dissipation and/or high noise immunity is desired, (2) Analog–to–
digital and digital–to–analog conversions, and (3) Magnitude and sign
generation.
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Speed
• Logic Edge–Clocked Design — Count Occurs on Positive Going Edge
of Clock
• Single Pin Reset
• Asynchronous Preset Enable Operation
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{• Capable of Driving Two Low–Power TTL Loads or One Low–Power}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Schottky Load Over the Rated Temperature Range}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE
Carry In
Up/Down
Preset
Enable
Reset
Clock
Action
1
X
0
0
X
No Count
0
1
0
0
Count Up
0
0
0
0
Count Down
X
X
1
0
X
Preset
X
X
X
1
X
Reset
X = Don’t Care
NOTE: When counting up, the Carry Out signal is normally high and is low only
when Q0 through Q3 are high and Carry In is low. When counting down,
Carry Out is low only when Q0 through Q3 and Carry In are low.
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
BLOCK DIAGRAM
1
PE
Q0
6
5
CARRY IN
9
RESET
Q1
11
10
UP/DOWN
15
CLOCK
Q2
14
4
P0
12
P1
Q3
2
13
P2
3
P3
CARRY
OUT
7
VDD = PIN 16
VSS = PIN 8
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
v v ^{operation, Vin and Vout should be constrained}
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs must be left open.
MC14516B
393