MC14514B Datasheet, PDF (1/8 Pages) ON Semiconductor – 4-Bit Transparent Latch/4-to-16 Line Decoder

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
4-Bit Transparent
Latch/4-to-16 Line Decoder
MC14514B
MC14515B
The MC14514B and MC14515B are two output options of a 4 to 16 line
decoder with latched inputs. The MC14514B (output active high option)
presents a logical “1” at the selected output, whereas the MC14515B (output
active low option) presents a logical “0” at the selected output. The latches
are R–S type flip–flops which hold the last input data presented prior to the
strobe transition from “1” to “0”. These high and low options of a 4–bit latch/4
to 16 line decoder are constructed with N–channel and P–channel
enhancement mode devices in a single monolithic structure. The latches are
R–S type flip–flops and data is admitted upon a signal incident at the strobe
input, decoded, and presented at the output.
These complementary circuits find primary use in decoding applications
where low power dissipation and/or high noise immunity is desired.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ • Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ^Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
L SUFFIX
CERAMIC
CASE 623
P SUFFIX
PLASTIC
CASE 709
DW SUFFIX
SOIC
CASE 751E
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBDW
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
BLOCK DIAGRAM
DATA 1
DATA 2
DATA 3
DATA 4
VDD = PIN 24
VSS = PIN 12
2
A
3
B
TRANSPARENT
21
LATCH
C
22
D
STROBE
1
4 TO 16
DECODER
S0 ¹¹
S1 ⁹
S2 ¹⁰
S3 ⁸
S4 ⁷
S5 ⁶
S6 ⁵
S7 ⁴
S8 ¹⁸
S9 ¹⁷
S10 ²⁰
S11 ¹⁹
S12 ¹⁴
S13 ¹³
S14 ¹⁶
S15 ¹⁵
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
ABCD
DECODE TRUTH TABLE (Strobe = 1)*
Inhibit
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Data Inputs
DCBA
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
XXXX
Selected Output
MC14514 = Logic “1”
MC14515 = Logic “0”
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
All Outputs = 0, MC14514
All Outputs = 1, MC14515
X = Don’t Care
*Strobe = 0, Data is latched
INHIBIT ²³
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14514B MC14515B
385