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MC14512B Datasheet, PDF (1/6 Pages) ON Semiconductor – 8-Channel Data Selector
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14512B
8-Channel Data Selector
The MC14512B is an 8–channel data selector constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. This data selector finds primary application in signal
multiplexing functions. It may also be used for data routing, digital signal
switching, signal gating, and number sequence generation.
• Diode Protection on All Inputs
• Single Supply Operation
• 3–State Output (Logic “1”, Logic “0”, High Impedance)
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient),
± 10
mA
per Pin
PD Power Dissipation, per Package†
500
mW
Tstg Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature (8–Second Soldering)
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
C
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
X
X
X
X
X = Don’t Care
TRUTH TABLE
A
Inhibit
Disable
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
X
1
0
X
X
1
Z
X0
X1
X2
X3
X4
X5
X6
X7
0
High
Impedance
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
X0 1
X1 2
X2 3
X3 4
X4 5
X5 6
X6 7
VSS 8
16 VDD
15 DIS
14 Z
13 C
12 B
11 A
10 INH
9 X7
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
v v operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs must be left open.
REV 3
1/94
©MMCot1or4o5la1, I2nBc. 1995
370
MOTOROLA CMOS LOGIC DATA