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MC14504B Datasheet, PDF (1/5 Pages) ON Semiconductor – Hex Level Shifter for TTL to CMOS or COMS to CMOS
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Hex Level Shifter for TTL to
CMOS or CMOS to CMOS
The MC14504B is a hex non–inverting level shifter using CMOS
technology. The level shifter will shift a TTL signal to CMOS logic levels for
any CMOS supply voltage between 5 and 15 volts. A control input also
allows interface from CMOS to CMOS at one logic level to another logic
level: Either up or down level translating is accomplished by selection of
power supply levels VDD and VCC. The VCC level sets the input signal levels
while VDD selects the output voltage levels.
• UP Translates from a Low to a High Voltage or DOWN Translates from
a High to a Low Voltage
• Input Threshold Can Be Shifted for TTL Compatibility
• No Sequencing Required on Power Supplies or Inputs for Power Up or
Power Down
• 3 to 18 Vdc Operation for VDD and VCC
• Diode Protected Inputs to VSS
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
LOGIC DIAGRAM
VCC
VDD
INPUT
LEVEL
SHIFTER
OUTPUT
MODE
TTL/CMOS
MODE SELECT
Mode Select
1 (VCC)
0 (VSS)
Input Logic
Levels
TTL
CMOS
1/6 of package shown.
Output Logic
Levels
CMOS
CMOS
MC14504B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
VCC 1
Aout 2
Ain 3
Bout 4
Bin 5
Cout 6
Cin 7
VSS 8
16 VDD
15 Fout
14 Fin
13 MODE
12 Eout
11 Ein
10 Dout
9 Din
This device contains circuitry to protect
the inputs against damage due to high static
voltages or electric fields referenced to the
VSS pin, only. Extra precautions must be
taken to avoid applications of any voltage
higher than maximum rated voltages to this
high–impedance circuit. For proper opera-
v v tion, the ranges VSS Vin 18 V and VSS
v v Vout VDD are recommended.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either
VSS or VDD). Unused outputs must be left
open.
REV 3
1/94
©MMCot1or4o5la0, I4nBc. 1995
332
MOTOROLA CMOS LOGIC DATA