MC14032B Datasheet, PDF (1/7 Pages) Motorola, Inc – Triple Serial Adders

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple Serial Adders
MC14032B
MC14038B
The MC14032B and MC14038B triple serial adders have the clock and
carry reset inputs common to all three adders. The carry is added on the
positive–going clock transition for the MC14032B, and on the negative–
going clock transition for the MC14038B. Typical applications include serial
arithmetic units, digital correlators, digital servo control systems, datalink
computers, and flight control computers.
L SUFFIX
CERAMIC
CASE 620
• Buffered Outputs
• Single–Phase Clocking
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range.
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{• Pin–for–Pin Replacement for CD4032B and CD4038B.}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{MAXIMUM RATINGS* (Voltages Referenced to VSS)}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _Symbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{VDD DC Supply Voltage}
– 0.5 to + 18.0
V
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{lin, lout Input or Output Current (DC or Transient),}
± 10
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{per Pin}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{PD Power Dissipation, per Packageâ€} 
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _{Tstg Storage Temperature}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ _TL
Lead Temperature (8–Second Soldering)
500
mW
– 65 to + 150
_C
260
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
BLOCK DIAGRAM
A1 10
B1 11
INVERT 1 7
ADDER 1 9 S1
A2 13
B2 12
INVERT 2 5
A3 15
B3 14
INVERT 3 2
CLOCK 3
CARRY RESET 6
ADDER 2 4 S2
VDD = PIN 16
VSS = PIN 8
ADDER 3 1 S3
MC14032B
LOGIC DIAGRAMS
(ONE SECTION AND COMMON INPUTS SHOWN)
MC14038B
A
A
B
S
B
S
INVERT
CARRY
RESET
CLOCK
DQ
C
REV 3
1/94
©_MM_Cot₁or₄o₀la₃, I₂n_Bc. 1_M99_C5_14038B
128
DQ
CR
TO
NEXT
STAGE
INVERT
CARRY
RESET
CLOCK
DQ
C
DQ
CR
TO
NEXT
STAGE
MOTOROLA CMOS LOGIC DATA